The present invention relates generally to integrated circuits and, more particularly to amplifiers having a low voltage CMOS differential amplifier input stage.
Today, electronic systems encompassing operational amplifiers generally have lower operating voltage supplies than they have in the past, mainly do to low power battery sources. Moreover, power supply voltages requirements continue to decrease, while dynamic range requirements remain essentially constant. Fortunately, various manufacturing processes for integrated circuits make it possible to create rail-to-rail differential input stages.
Although the various types of input stages operate from a single supply voltage source, the low voltage limit for amplifier operation differs for each type of input stage and each integrated circuit manufacturing process. Present op amp input stage designs exhibit voltage operation limits that hinder their application in products powered by batteries having an end life of near one volt. For example, an op amp using complimentary bipolar transistor differential pairs amplifying signals near positive and negative supplies has low operating voltage limitations imposed by standard transistor base to emitter voltage drops.
One conventional solution for rail-to-rail input stages has been the use of depletion-mode MOSFETs to provide amplification of the differential input. FIG. 1 is a schematic diagram showing a prior art input stage 100 for a low voltage operational amplifier. The input stage 100 includes a differential input signal VIN coupled to the gates of two N-channel depletion-mode MOSFETs 2 and 4. The drain of MOSFET 2 is coupled to one terminal of current source 6, and the drain of MOSFET 4 is coupled to one terminal of current source 8. The second terminals for both current sources 6 and 8 are coupled to operating potential VCC. Both source terminals of MOSFETs 2 and 4 are coupled to one terminal of current sink 10, while the other terminal of current sink 10 is coupled to ground reference. The bulk, or well, terminals of both MOSFET 2 and MOSFET 4 are also coupled to the ground reference.
The differential pair of MOSFETs 2 and 4 receives the input signal VIN and provides a differential output current from the drain terminals of MOSFETs 2 and 4 at inputs 14 and 16 to the rest of the system. While the prior art input stage 100 provides an input transconductance, input stage 100 has limited uses. For example, input stage 100 requires the input NMOS transistors 2 and 4 to have a particular combination of threshold voltage and bulk concentration to have proper common mode range and function correctly. This causes the process requirements for input stage 100 to be strictly defined so that the common mode input range is maximized.
In view of the forgoing, what is needed is a versatile operational amplifier input stage that can be used in a variety of applications powered from battery sources. In addition, the amplifier input stage should allow near rail-to-rail performance and increased design flexibility over that provided by prior art input stages.